User Manual
DSim is a Hardware Description Language (HDL) simulator developed by Metrics Technologies.
The simulator supports Verilog, SystemVerilog and VHDL (Beta).
NOTE: In order to use the DSim commands found in this User Manual through the DSim Cloud CLI, you must wrap the command options in single quotes. For more information, see User Guide: DSim Cloud CLI Tool simulator commands.
Glossary of Terms
Command Line Interface
Common Options
Setting Options by Scope Using Specification File
Language Conformance Options
Constraint Solver Options
Coverage Options
Input Filenames
Compile Once, Run Multiple Times
Using Libraries and Configurations
Running A Simulation
Stages Of A Simulation
Running A Verilog Simulation
Running A VHDL Simulation
Library Management
Waveforms
Verification Component Support
Programing Interface Support
Using the DPI and PLI
Using VHPI
Transparent Compression
Notes on DSim treatment of string characters
Notes on DSim treatment of SystemVerilog
Design and Verification Building Blocks
Scheduling Semantics
Delay Modeling
Data Types
IEEE 1735 Encryption
LRM Extensions
Notes on DSim treatment of VHDL (Beta)
Integral Arithmetic
IEEE 1735 Encryption
Frequently Asked Questions
Supporting Documentation
Release Notes
Known Issues/Limitations
Legalese: Licenses and Attributions